1. Field of the Invention
The present invention generally relates to semiconductor integrated circuits, and particularly relates to a reconfigurable semiconductor integrated circuit.
2. Description of the Related Art
In the field of communication, a software-defined radio provides for most of the processing relating to the communication system to be implemented based on software, thereby making it possible for a single radio transceiver to cope with various radio communication methods using different modulation schemes. Rewriting of the software achieves the updating of a communication method. When a new communication method emerges, new software is installed, thereby updating the device so as to cope with the new communication method without replacing the hardware.
In any fields, not limited to the field of communication, the use of a special-purpose LSI generally makes it possible to implement a high performance system that can perform a predetermined process with low power consumption. When there is a need to change the specifications to perform a different process, however, all the designing and manufacturing need to be redone. In this manner, special-purpose LSIs are extremely ill-suited for changing of specifications.
Configurations that are highly suitable for the changing of specifications include a system in which the processor executes software, and specifications are changed by rewiring the software. This configuration provides extremely high reconfigurability. However, since processors are designed to perform general-purpose processing and thus have high redundancy, their performance is rather low.
A technology that provides reconfigurability and yet provides hardware-based processing includes a FPGA (field programmable gate array). FPGAs provide for reconfiguration to be effected on a gate-by-gate basis by making connections between logic elements freely reconfigurable based on the reconfiguration data stored in memory. Since FPGAs have large hardware redundancy, their size may be 10 times as large as the special-purpose LSIs (Large Scale Integrations) in terms of the scale of circuits, resulting in increased costs and power consumption. Compared with special-purpose LSIs, further, FPGAs have rather low processing speed.
Recently, attention has been drawn to dynamic reconfigurable LSIs (dynamically reconfigurable semiconductor integrated circuits), which provide reconfigurable circuits, and yet provide high processing performance. In dynamic reconfigurable LSIs, a plurality of computing units are arranged in an array, and buses arranged in rows and columns connect these computing units with each other. Around the array of the computing units are provided a configuration memory for storing configuration information regarding the array of the computing units and a control unit for controlling the dynamic switching of configurations.
In such dynamic reconfigurable LSIs, a basic unit of reconfiguration is a computing unit, which has a far larger granularity (the size of the reconfigurable unit) compared with a single gate or the like which is a basic unit of reconfiguration in FPGAs. Further, the provision of the computing units in an array structure makes it possible to perform parallel processing, thereby enabling to perform heavy computation such as complex-number computation or sum-of-product computation at high speed.
In the field of a software-defined radio, the use of reconfigurable circuits such as FPGAs and/or dynamic reconfigurable LSIs makes it possible to provide various communication methods in a reconfigurable fashion. Dynamic reconfigurable LSIs exhibit high performance on heavy computations, but have large granularity, which creates a drawback in that it is difficult to efficiently achieve diligent control such as conditional branching based on decoded results, for example. On the other hand, it is easy to use FPGAs to implement diligent control because of their small granularity. FPGAs are, however, not satisfactory in terms of computation speed.
Accordingly, there is a need for a reconfigurable semiconductor integrated circuit that can provide high performance both on diligent control and on heavy computation.